I developed a Robotic System and its Software application for Sapco (Iranian oldest Automobile parts manufacturer Company). It uses two AC Servo Motors to test stability, flexibility and durability of car keys. I completely designed and developed the electrical board and the software, both micro-controller and PC application.
Here is a short video of this machine.
I developed an Embedded Device and a swift based IOS application for Back Posture Rehabilitation.
It uses a 9DOF IMU to detect the posture, a linear vibrate based motor to give haptic feed-back, and Bluetooth Low Energy to make a connection with a smartphone.
I designed the main board for controlling Washing Machine functionality. It uses a PIC micro-controller that has been programmed through C to perform in real-time.
Ultrasonic homogenizers, commonly referred to as “sonicators,” disrupt tissues and cells through cavitation and ultrasonic waves. Basically, an ultrasonic homogenizer has a tip which very rapidly vibrates, causing bubbles in the surrounding solution to rapidly form and collapse. This creates shear and shock waves which tear apart cells and particles.
Ultrasonics / sonicators are great for breaking apart cells and subcellular structures in suspension. They are not good for homogenizing intact tissue. Ultrasonic homogenizers can also shear DNA, which could be a good thing or a bad thing depending on your application. Other applications include creating emulsions, dispersing nanoparticles, and reducing the size of particles in suspension.
In This Project I designed the main board PCB using Altium Designer, and developed FPGA core.
In this project an XC3S-400 FPGA has been used as the main processor, an Atmel ATXmega128A4U has been used as the co processor.
Other component are listed below:
- SSD1963: LCD Controller
- HLK-RM04: Wifi module
- LM2576, AMS1117: Regulators
- DS3231: Real Time Clock (RTC)
- 74AC244M: IO Buffer
PCB in 3D and 2D are depicted bellow.
The Assembled Device Pictures:
Here is a short video of the 400W device in action:
This is my B.Sc. final project.
In this project the goal is make a Laser range finder with range of 50 meters.
Calculate the time of flight of the laser light is extremely difficult and expensive. Hence in this project, a sin wave was modulated on the laser light, and the distance was measured using the calculation of the phase shift between the send and receive signal.
In the classic methods, an analog mixer is used to reduce the frequency of the data, then with a push detector, the current phase can be extracted. On the other hand, in this method, a D-Latch has been used to detect the phase shift, and thanks to the fast response time of D-Latch, the mixer can be removed.
In the figure bellow block diagram of a very typical Laser range finder depicted.
In the figure below my method block diagram is presented, as you can see it is less complicated.
I designed 3 versions of FPGA-Based PCB for Parsian.
- Test Bed
A test bed platform was designed to satisfy the need for observation of the effects of a single parameter on the whole system, comparison of different modules, and test, evaluation and optimization of every part of robots’ electronics.
The test bed board (figure below) is consisted of a stabilized power source that generates 5v, 3.3v, 2.5v and 1.2v, I/O ports (UART, SPI, USB and J-TAG) and three different interfaces for the processor, motor drivers and wireless communications modules to be able to change each of these modules separately.
After testing the test bed we found out optimal design for our main board (figure below).
The main board which had been used last year was fully functional, but it had some defects. For instance, the only way to represent events, problems, warnings, etc. was showing them on some LED’s or send them with wireless network to the debug computer, also it didn’t have any non- volatile memory to save failures that were being happened during the game.
- Processing unit
XC3S400 FPGA is used as main processor. in this version an ATMEL ATXMEGA128A4U micro controller is added as co-processor. Block diagram of this version is shown bellow.
FPGA devices are mainly appropriate for parallel algorithms implementation. Due to less power consumption, simpler board layout and fewer problems with signal integrity and electromagnetic interface. Consequently quadrature decoder, PWM generation, BLDC sequence generator modules and serial communication are implemented in a hard CPU core which is dedicated part of the integrated circuits, whereas sensors data decoder,
controller loop handler and other modules are implemented in a soft CPU core which utilizes general purpose FPGA logic cells. We implemented a TSK3000A based soft processor on the FPGA. I used Altium Designer software to change processor or modify the code running on it. The Soft core is connected to the other blocks via wishbones. These blocks are BLDC Controller, Kick Block and Communication Block which are developed using Verilog language.
In the figure below the main structure of the FPGA core is depicted. The green Blocks are custom Verilog blocks, and the Yellow Blocks are Soft-core dependent blocks such as wishbone blocks.
Maxon EC-45 motors are used as Parsian’s main actuators. They have some problems which are described below. Hence, in order to increase durability and performance we decided to modify them.
We suggested this changes to maxon and they implemented some of them in their new designs.
Problem : fracture in connections between the coil and main structure of motor that causes the hall sensors to brake.
Solution : select appropriate connection for safe torque transfer
Problem : Rotational component depreciation such as bearings
Solution : Coaxial and fix components with appropriate locating.
Problem : tearing the flat motor cable over time.
Solution : modular connections.
The final design is depicted below: